The invention principally relates to a device and to a method for generating control signals and more particularly the read or write enable signals of line memories in a television device.
It is known to produce television receivers com prising memories capable of storing all or part of the image to be displayed. There are known in particular television devices comprising a line memory capable of storing an image line to be projected. Such devices have the disadvantage of generating a delay of one line between the reception and the display. This delay can have serious consequences in the case in which it is necessary to generate read or write enable signals for such a memory (WRITE ENABLE, READ ENABLE or, in abbreviated form, WE and RE respectively in English terminology). The over-bar signifies that the signals are active in the low state. It is of course understood that the use of active signals in the high state does not depart from the scope of the present invention. In fact, in conventional type devices different synchronization signals are used for carrying out the writing and the reading of an image line. Thus, the reading of a line can be affected by the synchronization shift called jitter occurring between two successive lines of the image. Thus, for example, a vertical white line re-read from a device of known type comprises points horizontally shifted to the left or to the right depending on the synchronization shift present.
The device according to the present invention generates read and write signals of a line memory, for the same information, from a single time reference, in order to avoid the appearance of the said jitter affecting the lines of the video image.
In a first embodiment, the write and read signals are directly generated from a same time reference
In a second embodiment, the write enable signal WE is generated from a time reference. The read enable signal RE is generated from the write enable signal WE.
The device according to the present invention is particularly useful in the device comprising two line memories connected in parallel, each being alternately in the read mode and in the write mode while the other is in the read mode and then in the write mode. An example of this type of device is constituted by the television image unscrambling device.
The invention relates principally to a device for the generation of write control signals (WE) and of read control signals (RE) in a memory of a video signal element, characterized in that it comprises means of generating the said control signals (RE, WE) directly or indirectly from a same time reference
The invention also relates to a device characterized in that the element of the video signal is a display line.
The invention also relates to a device characterized in that it comprises, connected in series, means of the write control signal (WE) and the means of generating the read control signal (RE) in such a way that the read control signal (RE) is generated from the write control signal (WE).
The invention also relates to a device characterized in that the said device is a digital device.
The invention also relates to device characterized in that the means of generation of the time reference, the means of generation of the write control signals (WE) and/or the means of generation of the read control signals (RE) comprise a counter whose output is connected a decoder.
The subject of the invention is also an unscrambling device characterized in that it comprises two stacks of the first in, first out (FIFO) type working alternately in the write mode and in the read mode.
The subject of the invention is also an unscrambling device characterized in that it comprises two dynamic random access memories working alternately in the write mode and in the read mode connected by an address bus to an addressing device.
The subject of the invention is also a television set characterized that it comprises an unscrambling device.
The subject of the invention is also a method for generating write control signals (WE) and read control signals (RE) of a video line in a storage device characterized in that it comprises the steps:
generation of a time reference for a line i,
generation directly or indirectly from the time reference of the line i of the write control signal of the line i (WE) and of the read control signal of the line i (RE).
The subject of the invention is also a method characterized in that it comprises the steps:
generation of the write control signal of the line i (WE) from the time reference of the line i,
generation of the read control signal of the line i (RE) from the write control signal of the line i (WE).
The subject of the invention is also a method characterized in that it comprises the steps of generation of write control (WE) and read control (RE) signals of the line i directly.